The lighting principles of a Carbon Nano Tube Field Emission Display (hereafter CNT-FED) and CRT are the same: electron beam hitting the fluorescent particles. Thus, the CNT-FED is featured for high quality, high brightness, high reaction and durable and has advantages of being light and thin and having low power consumption as does the CRT.
In FIG. 1, a standard triode CNT-FED is shown having a dielectric layer 13 and a cathode layer 12 are stacked on a substrate 11 consecutively. A plurality of dielectric openings 131, the material of loading CNT to be the emitting source 15, is formed on the dielectric layer 13, the bottoms of which reach the surface of cathode layer 12. Besides, an anode layer 22 is located on an upper substrate 21 and some fluorescent particles 23 are on the anode layer 22. A separator (not shown) is arranged between the upper and lower substrates to locate the distance thereof. Circuits are arranged on the cathode layer 12, a gate electrode 14 and the anode layer 22 and connected to an outside power supply (not shown). Then, a CNT-FED is formed by vacuum and package. The method of operations of the CNT-FED is that on the cathode layer 12, the emitting source 15 emits electrons induced by the high voltage provided by the anode layer 22. When the fluorescent particles 23 on the surface of the anode layer 22 is hit by the electron beam to display, the require voltage for inducing electrons from the emitting source 15 is lowed by the gate electrode 14 in order to control the switch of the FED by the low voltage.
In FIG. 2, a top view of the structure of the lower substrate (i.e. cathode layer and gate included only) of triode CNT-FED with matrix arrangement is shown. Obviously, the cathode layer 12 and the gate electrode 14 are arranged by crisscrossing and are layered. It needs twice to connect the cathode layer 12 and the gate electrode 14 to the outside power supply and is too hard to control the process because of the different lengths of circuits. Thus, the cost of manufacturing is increased substantially.
Furthermore, there are two conventional processes of manufacturing triode CNT-FED. One is a conventional thin film process of manufacturing semiconductor, the disadvantages of which are the complex processes, high cost and the lithography is not applicable when in the age of nano-line width. The other one is thick film screen print that features a lower cost but is unstable to control and the resolution is restricted to the thickness of the dielectric layer of the thick film.
Technology of Nano-Imprint Lithography (hereafter NIL) has been used in the semiconductor field since the paper written by Prof. Stephen Chou in 1996 of which the principle is similar to sigillography. Referring to drawings FIG. 3A through FIG. 3C, the standard NIL applied to the field of semiconductor is shown. First, the printed patterns are made on a mold 31 by lithography and etching methods (such as mask, electron beam etching, focused ion beam etching) to form patterns on the surface of the mold 31 and plastic material 32, such as Polymenthyl methacrylate (PMMA), is coated on the substrate 33. Then, the printed patterns are stamped on the surface of the plastic material 32 during appropriable temperature and pressure to transfer the patterns from the mold 31 to the plastic material 32. The advantages of replacing the conventional lithography process by NIL are: the manufacturing of mold can be made by e-beam to be the degree of nano-resolution and the process of moldboard stamping can be improved; besides, the mold can be reused and has a longer period than the conventional mask reducing the cost of manufacturing.
The present invention has a structure of a coplanar gate-cathode of a triode CNT-FED by a NIL to produce a reliable, easy and simple to use, and low cost triode CNT-FED.